RTL-to-GDSII Backend Design

Introduction to Analog IC Design

Course Overview

Digital ICs consist of standard cells that are placed and routed automatically by providing the necessary scripts to the industry standard software tools. However, these scripts are usually provided by companies and minimal design-specific considerations were being performed. In large scale digital systems where tight design constraints are present, adequate knowledge on the physical design steps is crucial. This course serves as an introduction to the physical implementation of digital integrated circuits (IC)s using electronic design automation (EDA) tools. Each physical implementation stage will be discussed covering both theory and practical considerations. Emphasis will be given on understanding the design constraints and the corresponding trade-offs throughout the implementation flow. This will enable the trainees to determine whether a design constraint is feasible or not and meet the target constraints, if applicable, through efficient tool utilization. Tool use will be presented both in GUI and TCL scripts to enable participants to perform design visualization and automation, respectively.

Course Prerequisites

The trainees for this course are expected to have taken electronics courses covering semiconductor device physics i.e. diodes and bipolar junction transistors. Moreover, the trainees are expected to have strong background on circuit analysis of passive and active devices including DC and small-signal. A background on linear systems analysis is also required.

Lectures Overview

Lecture Topic
1Physical Implementation Overview
2Physical Implementation Walkthrough
3FloorPlanning
4Power Network Synthesis
5Placement
6Clock Tree Synthesis
7Routing
8Chip Finishing
9Physical Implementation Review Using Alternative Tools
10Engineering Change Order

Laboratory Topic
1Tool Familiarization
2TCL Scripting
3Floorplanning
4Power Planning
5Placement
6Clock Tree Synthesis
7Routing
8Chip Finishing
9Engineering Change Order
ProjectSimple processor physical design with area and power distribution constraints

Schedule

AM Session: 8am to 12nn
PM Session: 1pm to 4pm
Day AM/PM Lecture Lab
1AMLecture 1
Lecture 2
Lab 1
PMLab 2
2AMLecture 3Lab 3
PMLecture 4Lab 4
3AMLecture 5Lab 5
PMLecture 6Lab 6
4AMLecture 7Lab 7
PMLecture 8Lab 8
5AMLecture 9
Lecture 10
Lab 9
PMProject

Creators

Adelson N. Chua
University of the Philippines
PIIC Staff
Philippine Institute for Integrated Circuits
Microelectronics and Microprocessors Laboratory
University of the Philippines

Lecturers

  • Adelson N. Chua, University of the Philippines

Recommended Texts

  • Synopsys Worldwide University Curriculum Programs
    • Advanced IC Physical Design
    • Chip Design
    • Digital ASIC Design
    • VLSI Design
  • EDA Tool Use
    • ASIC Design Flow Tutorial using Synopsys Tools
    • IC Compiler 1 Workshop (Lab Guide)
    • IC Compiler Implementation User Guide