Introduction to Verilog HDL

Introduction to Verilog HDL

Course Overview

Increasing complexity of digital systems necessitates a greater emphasis for computer-aided design tools which facilitate design entry, verification and automation of hardware generation. As such HDL, or Hardware Description Language, provides a key element to simplifying complex digital system design to minimize the time and cost it takes to design such IC technologies. In order then to be able to build digital systems, the designer must have an understanding of HDL. This course provides the trainees with an introduction to the hardware description language based digital design methodology. The main focus is the use of Verilog HDL to describe complex digital circuits. A major emphasis of this course is to teach the participants how to write HDL synthesizable codes. This will provide the trainees the skills to verify digital circuits for functionality.

Course Prerequisites

The trainees taking this course are expected to have completed classes covering digital logic analysis and design. A basic understanding of Boolean logic and Boolean algebra as well as background on gate-level description of digital circuits is needed.

Lectures Overview

Lecture Topic
1Introduction and Review of Boolean Logic
2Introduction to Unix Commands
3Digital Logic Building Blocks
4Hardware Description Language Overview
5Structural and Gate-Level Modeling
6Behavioral Modeling
7Review of Sequential Circuits
8Modeling of Sequential Circuits
9Finite State Machines
11Issues in Digital Design
12Introduction to Constraints

Laboratory Topic
1UNIX/Linux Command Line Familiarization
2Tool Familiarization
3Combinational Circuits I
4Combinational Circuits II
5Sequential Circuits
6Finite State Machines I
7Finite State Machines II
8Synthesis Examples
8Timing Constraints
ProjectSynthesizable Hardware Descirption of an 8-bit sequential multiplier


AM Session: 8am to 12nn
PM Session: 1pm to 4pm
Day AM/PM Lecture Lab
1AMLecture 1
Lecture 2
Lab 1
PMLecture 3
Lecture 4
Lab 2
2AMLecture 5Lab 3
PMLecture 6Lab 4
3AMLecture 7
Lecture 8
Lab 5
PMLecture 9Lab 6
4AMLecture 10Lab 7
PMLecture 11Lab 8
5AMLecture 12Lab 9
PMProjectProject Checking


Chris Vincent J. Densing
University of the Philippines
PIIC Staff
Philippine Institute for Integrated Circuits
Microelectronics and Microprocessors Laboratory
University of the Philippines


  • Chris Vincent J. Densing, University of the Philippines
  • Ryan M. Alocilja, University of San Carlos

Recommended Texts

  • Design of Analog CMOS Integrated Circuits by Behzad Razavi
  • Analysis and Design Analog Integrated Circuits by Paul Gray, Fred Hurst, Stephen Lewis, Robert Meyer
  • CMOS Circuit Design Layout and Simulation by R. Jacob Baker